As most of you know (I mean the devs), and people following along,
the cell has yet to be cracked. Ya? problem, eh?
What I was thinking last night in a brainstorm, may not be nothing at all, but it's better to be posted and criticized instead of being quiet about it
Not really an idea, but I have more of a theory that I haven't seen attempted as of yet. This requires extreme soldering skill, and a map of the I/O locations for the CELL. That being said, I'm going to get down to business.
I have very little, but years of electronics experience, but when it comes to newer things I have a big (?) on myself.
The cell runs at what, 3.2Ghz?
None of the above is important really. Devs - know that the cell will kernel panic and kick the PS3 off, potentially protecting code that is dormant in SPU8, or the last one that is there for redundancy checks and what-not. Maybe even the other SPUs with isolated code?
The signal to power off will immediately destroy any data on the SPUs that isn't burned-in, meaning it's gone when the power goes off.
The idea runs along the lines of pumping some power into the CELL. Instead of letting the ps3 get away with protecting itself, why not steadily have power go to the CELL after it has told the PS3 to shut off? Is it not that simple?
Supplying a steady amount of voltage to it would have the data remain on the cpu, resulting in no locked regsiters or addresses even tied to RAM, since ram is destroyed (lost) too during power loss.
The 2.35 ps3 I got on craigslist a few days ago simply would be one of the perfect test points, it's 60GB, and again is on FW 2.35. I'd like to know if a dev would test this with me, because there is really no way to go wrong.
again, this is just a theory, so don't point fingers about someone being right or wrong here.